1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same. More particularly, the present invention relates to a capacitor including a dielectric layer having an inhomogeneous crystalline region, and a method of fabricating the same.
2. Discussion of the Related Art
With an increase in the integration of a semiconductor device, a minimum line width of a device is decreased down to a level less than 1 μm, and a capacitor area is also reduced. With such a trend in the semiconductor industry, in order to prevent deterioration of device performance, and a decrease in reliability thereof, a capacitance should be sufficiently provided and a breakdown voltage should be sufficiently high, even though a size of a capacitor is reduced. Particularly, a capacitor, which is used in an analog element such as a CMOS image sensor, a liquid crystal display driver integrated circuit (LDI), a plasma display panel driver integrated circuit (PDI), or the like, should provide a breakdown voltage above a predetermined voltage level.
Methods of increasing a capacitance of a capacitor include increasing an area of the capacitor, forming a capacitor dielectric layer of a high-dielectric-constant material, or reducing a thickness of a dielectric layer. However, there remain many limits to increasing an area of the capacitor with an increase in the integration of a semiconductor device. Also, there remains a limit to increasing a capacitance of the capacitor by reducing a thickness of a silicon oxide (SiO2) layer, which is generally used as a capacitor dielectric layer.
Further, a maximum voltage that can be stably supplied to a capacitor, i.e., breakdown voltage, depends on a dielectric strength and a thickness of a dielectric layer. While a thickness of the dielectric layer needs to be reduced in order to increase capacitance, a thickness of the dielectric layer needs to remain above a predetermined level in order to increase breakdown voltage. Therefore, a high-dielectric-constant material is used for the capacitor dielectric layer, thereby achieving a capacitance without a reduction in the thickness of the dielectric layer, and preventing a decrease in breakdown voltage.
FIG. 1 illustrates a sectional view of a conventional capacitor fabricated by conventional technology. The capacitor C includes a lower electrode 13, a dielectric layer 14, and an upper electrode 15. The lower electrode 13 is connected to a semiconductor substrate 10 via a plug 12 passing through an interlayer insulating layer 11, which is formed on the semiconductor substrate 10. The dielectric layer 14 may be composed of a high-dielectric-constant material such as (Bax, Sr1−x)TiO3, TiO2, Ta2O5, ZrO2, Zr-silicate, HfO2, Hf-silicate, A12O3, Y2O3, Pb(Zr, Ti)O3, or the like. However, use of a crystalline high-k dielectric layer causes a problem with respect to a decrease in breakdown voltage. For example, since a crystallization temperature of HfO2 is low, when depositing a thick HfO2 layer, the HfO2 may be easily crystallized during the deposition, thereby decreasing breakdown voltage.